1. Field of the Invention
The embodiments of the invention generally relate to semiconductor chips and, more specifically, to semiconductor chips that include inactive devices that are aligned with each other to form a thermal path through the layers of the semiconductor chip and potentially through the entire semiconductor chip.
2. Description of the Related Art
Low dielectric constant materials (low-k dielectric materials) in multilevel very large scale integration (VLSI) circuits significantly decrease heat transfer. This inhibits heat generated by active devices from being able to travel through the back end metallurgies of a semiconductor chip to a heat sink at the top of the chip. Such low-K dielectric materials also impact dissipating heat generated by the integrated circuit wires themselves. This problem is complicated further by stacked chip effort of today's advanced devices. The joule heating of interconnect wires and vias can also be a major thermal source that needs to be addressed.
Hence, there is a need for a cooling solution that efficiently removes significant heat from the interconnect levels of a semiconductor chip, and that transfers heat through the interconnect levels without significant area penalties. This is all the more crucial today with the plans for stacked chips.